Intel Announces Basin Falls: The New High-End Desktop Platform and X299 Chipsetby Ian Cutress on May 30, 2017 3:01 AM EST
Discussion about the High-End Desktop (HEDT) space this year has been unparalleled. When an age-old competitor re-entered the field, it provided new life into a somewhat dormant platform: how to bring high-performance computing and experiences to the premium segment of the market that was not interested in the business aspect of the ‘professional’ side. Over the last several years in this space, we have seen Intel launch Sandy Bridge-E, Ivy Bridge-E, Haswell-E and Broadwell-E. Today marks the announcement for the next set of processors, named Skylake-X and Kaby Lake-X. But like the platforms before, built on X79 and X99 chipsets, these two new processor families will be covered by the new X299 chipset, code-named Basin Falls.
Normally we expect to see each generation of Intel’s HEDT platform be a generation behind the mainstream parts: Sandy Bridge-E was launched when Ivy Bridge was mainstream, Broadwell-E was launched when Skylake was mainstream and so on. There was always a delay in cadence, given that these HEDT CPUs, which are derived from the enterprise CPUs, required more time to qualify but also as a market segmentation strategy. For today’s launch of Basin Falls, this strategy changes.
With X299, Intel is launching HEDT processors based on Skylake, called the Skylake-X family, and processors based on Kaby Lake, called the Kaby Lake-X family. This is a name change from the ‘Broadwell-E’ family which used an E, and now we assume the X stands for Xtreme. All the processors in this family will have an X in them, and the bottom model starts as a six-core processor, putting it above the quad-core parts found in the mainstream platforms. Skylake-X, as we understand it, was initially set to have up to 12 core components, harvesting the smaller silicon used in the enterprise Xeon family. Part of today’s announcement is that Intel will also bring the middle-sized enterprise silicon to consumers, with Skylake-X parts being offered up to 18 cores. This is a break in what we traditionally get on the HEDT platform. Kaby Lake-X will re-use Kaby Lake-S silicon, but with the integrated graphics disabled and better design specifications to push the frequency higher over the mainstream versions.
This news piece centers around X299 however: the chipset and the motherboards that will bear this chipset. X299 is a marked change from previous X-series chipsets, thanks to the Z-series chipsets on the mainstream processor line. For a couple of generations, the Z-series chipsets have adopted the HSIO (High-Speed IO) topology, essentially allowing the chipset to act like a big PCIe switch. Using the DMI 3.0 link from the processor, which by any other name is essentially a PCIe 3.0 x4 link, the chipset can support 20-24 lanes of PCIe 3.0 from it in various combinations. With access to 20-24 PCIe lanes from the chipset, rather than having to bother the CPU for PCIe lanes and reduce potential graphics performance, motherboard manufacturers were able to go overboard with additional functionality. This has included more SATA ports, more networking ports, higher performance networking ports such as 10G, extra storage ports, elements such as PCIe storage in an M.2 form factor, or add special unique features specific to that motherboard manufacturer’s package. While there is technically an uplink bottleneck, that is rarely hit unless a user decides to play with multiple high-speed PCIe 3.0 x4 storage devices. What X299 brings to the table for HEDT is this HSIO concept, mirroring the consumer chipset platform.
New controllers, such as Aquantia’s AQtion multi-gigabit ethernet chips as well as PCIe storage are now available on the high-end desktop platform for motherboards that implement them. In order to get the same level of coverage, motherboard manufacturers used to have to use a PEX PLX switch – since being bought by Avago, these switches are now 3x the cost, and they introduced a small amount of latency for offering more functionality. The new chipset design hopefully negates those issues.
The DMI link also changes, moving from DMI 2.0 speeds in X79/X99 to DMI 3.0 speeds in X299 to mirror the consumer platforms. As mentioned above, this is practically the same as a PCIe 3.0 x4 link, but at least the HEDT platforms now get to play with higher bandwidth.
X299 is also going to promote Optane support with the 16GB/32GB Optane drives that are currently on the market available for Intel RST caching modes, as with the Z270 platform. This is somewhat of a non-story, given that X299 is high end: we would expect anyone looking into the Basin Falls ecosystem to already be considering an SSD as an operating system drive to begin with. Optane support only really helps with systems that still want rotating rust (a mechanical HDD) as a main drive. There is support for Optane PCIe SSDs as well, but in essence these are just PCIe drives which would be supported anyway. Intel has not commented on Optane DRAM support, but this is unlikely, given it has not even been announced for enterprise platforms (and reports suggest it is further away than we initially thought).
So unlike the consumer platforms, we only have one chipset to worry about with HEDT (as is normal). X299 will support natively up to eight SATA 3.0 ports, and up to 10 USB 3.0 ports. We expect there to be some mixing and matching here, but we are waiting for information from Intel, along with the TDP. Intel hasn’t stated which of the SATA ports support RST/RAID, however also to gain parity with the consumer platform, X299 will support RAID with up to three PCIe 3.0 x4 devices. However in order to get the maximum peak bandwidth, motherboard manufacturers will have to derive all the ports from the CPU, not the chipset. Which brings us on to the biggest quirks with Basin Falls.
Supporting 16, 28, and 44 PCIe Lane Processors
As part of the announcement today, Intel is announcing three sets of processors if we band them together by PCIe lane count. The Kaby Lake-X quad core CPUs will feature 16 PCIe lanes, whereas the Skylake-X family will split between 28 PCIe lanes for the low-end processors and 44 PCIe lanes for the high-end processors.
One of the requirements for X299 is that every SKL-X and KBL-X processor must work in all X299 motherboards.
If you have ever picked apart a motherboard block diagram, or had to deal with issues from previous HEDT platforms relating to what is enabled with what CPU, this can only generate a headache for both motherboard manufacturers and users alike.
In order to explain this, here’s an example.
Say a motherboard manufacturer is designing a mid-to-high end motherboard. They have three PCIe slots from the CPU for graphics, supporting x16/x16/x8 (or x16/x16, x16/x8/x8 or x8/x8/-). The board also supports a CPU based 10G network controller (4 lanes), but also in order to get the best storage performance, they also have two PCIe 3.0 x4 storage slots based on M.2.
- If a user has a 44 lane CPU in place with two storage drive, the GPU slots can move to x16/x16 or x16/x8/x8, leaving 12 PCIe lanes for the network controller and storage.
- If a user has a 28 lane CPU in place with a storage drive, the GPU slots can move to x8/x8 with 12 lanes for network controller and storage
- If a user has a 16 lane CPU in place with one storage drive, the GPU slot can be x8 with the network controller and storage active, or if the GPU slot(s) is x16 or x8/x8, then the network controller and PCIe storage is disabled, unless muxes and quick switches are equipped on the motherboard to carry the signal around such that the PCIe storage moves to chipset based, or defaults to SATA only, or etc etc etc
The minute you try and put high-end configurations onto a system, without careful planning (and the expense of routing the signals and muxing/switching the pathways), if a user puts a cheaper processor in place they might lose access to all the extra functionality they paid for.
The other element is the memory configuration issues. The Kaby Lake-X processors will support dual-channel memory, whereas the Skylake-X processors support quad-channel memory. This means that motherboard vendors will have one of three configurations:
- Eight DRAM slots, for four channels at 2 DIMMs per channel (2 DPC)
- Four DRAM slots, for four channels at 1 DPC
- Four DRAM slots, for dual channel at 2 DPC
Not only do you have to make sure the board supports your configuration, but for the four-slot designs, if a user chooses the middle option, four slots for four channels at 1DPC, any Kaby Lake-X processor will only be able to use two slots. For the eight DRAM slot design, Kaby Lake-X processor users will have to ensure that if they have two of four memory modules that they are in the right slots, and the motherboard manufacturers have to ensure that the users can easily determine which ones are in use otherwise they might see the memory but not have the performance, or vice versa.
This is arguably a big mess. In order to compensate, boards might not implement the high-end configurations, meaning that a top of the line processor might not use all the features it comes with.
What we will likely end up seeing is a split strategy from the motherboard manufacturers. We will see motherboards targeted at either Skylake-X or Kaby Lake-X. All CPUs will work in all boards, but if you pair a SKL-X CPU with a KBL-X focused motherboard, the user may not be able to take advantage of all the features of the CPU they paid for. Vice versa, putting a KBL-X processor in a SKL-X focused board, a number of features that the motherboard has will be unavailable to you.
One of my requests for the motherboard manufacturers as I have met them over the last few visits is that they need to explain how the motherboards are configured in excruciating detail. This means block diagrams, and not just one diagram: have separate diagrams of what is available if a user decides to implement a 16, 28, or 44 lane processor in play. All that being said, I can see annoyance on the horizon if users do not do the research. While adding support for quad-core KBL-X processors on the HEDT platform is an interesting move, it’s not one I would have suggested without bringing parity on the PCIe lane count (although that would require new silicon dies, and perhaps would not be worth the cost of designing them).
Perhaps a final note about X299 based motherboards. All will support overclocking on the CPU and DRAM, with multiplier and base clock frequency adjustments expected. Typically with a new launch, the motherboard manufacturers will run internal overclocking events using any manner of sub-zero coolants in order to launch with as many overclocking world records as possible. We are told to expect records to be broken with both KBL-X and SKL-X, though it will be interesting to see how that translates into 24/7 overclocks.