Around 15 months ago, AMD announced that it would be building 64-bit ARM based SoCs for servers in 2014. Less than a month into 2014, AMD made good on its promise and officially announced the Opteron A1100: a 64-bit ARM Cortex A57 based SoC.

The Opteron A1100 features either 4 or 8 AMD Cortex A57 cores. There's only a single die mask so we're talking about harvested die to make up the quad-core configuration. My guess is over time we'll see that go away entirely, but since we're at very early stages of talking about the A1100 there's likely some hedging of bets going on. Each core will run at a frequency somewhere north of 2GHz. The SoC is built on a 28nm process at Global Foundries.

Each pair of cores shares a 1MB L2 cache, for a total of up to 4MB of L2 cache for the chip. All cores share a unified L3 cache of up to 8MB in size. AMD designed a new memory controller for the Opteron A1100 that's capable of supporting both DDR3 or DDR4. The memory interface is 128-bits wide and supports up to 4 SODIMMs, UDIMMs or RDIMMs. AMD will be shipping a reference platform capable of supporting up to 128GB of Registered DDR3 DIMMs off of a single SoC.

Also on-die is an 8-lane PCIe 3.0 controller (1 x8 or 2 x4 slot configurations supported) and an 8-port 6Gbps SATA controller. AMD assured me that the on-chip fabric is capable of sustaining full bandwidth to all 8 SATA ports. The SoC features support for 2 x 10GbE ports and ARM's TrustZone technology. 

AMD will be making a reference board available to interested parties starting in March, with server and OEM announcements to come in Q4 of this year. 

It's still too early to talk about performance or TDPs, but AMD did indicate better overall performance than its Opteron X2150 (4-core 1.9GHz Jaguar) at a comparable TDP:

AMD Opteron A1100 vs. X2150
  CPU Core Configuration CPU Frequency SPECint_rate Estimate SPECint per Core Estimated TDP
AMD Opteron A1100 8 x ARM Cortex A57 >= 2GHz 80 10 25W
AMD Opteron X2150 4 x AMD Jaguar 1.9GHz 28.1 7 22W

AMD alluded to substantial cost savings over competing Intel solutions with support for similar memory capacities. AMD tells me we should expect a total "solution" price somewhere around 1/10th that of a competing high-end Xeon box, but it isn't offering specifics beyond that just yet. Given the Opteron X2150 performance/TDP comparison, I'm guessing we're looking at a similar ~$100 price point for the SoC. There's also no word on whether or not the SoC will leverage any of AMD's graphics IP.

The Opteron A1100 is aimed squarely at those applications that either need a lot of low power compute or tons of memory/storage. AMD sees huge demand in the memcached space, cold storage servers and Apache web front ends. The offer is pretty simple: take cost savings on the CPU front and pour it into more DRAM.

Early attempts at ARM based server designs were problematic given the lack of a 64-bit ARM ISA. With ARMv8 and the Cortex A53/A57 CPUs, that's all changed. I don't suspect solutions like the Opteron A1100 to be a knockout success immediately, but this is definitely the beginning of something very new. Of all of the players in the ARM enterprise space, AMD looks like one of the most credible threats. It's also a great way for AMD to rebuild its enterprise marketshare with a targeted strike in new/growing segments. 

AMD's Andrew Feldman included one of his trademark reality check slides in his Opteron A1100 presentation today:

Lower cost, high volume CPUs have always won. That's how Intel took the server market to begin with. The implication here is that ARM will do the same to Intel. Predicting 25% of the server market by 2019 may be feasible, but I'm not fond of making predictions for what the world will look like 5 years from now. 

The real question is what architecture(s) AMD plans to use to get to a leadership position among ARM CPUs and a substantial share of the x86 CPU market. We get the first hint with the third bullet above: "smaller more efficient x86 CPUs will be dominant in the x86 segment".

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  • tuxRoller - Wednesday, January 29, 2014 - link

    The problem with software raid would be that the parity code is almost certainly written in assembler.
  • insanemal - Thursday, January 30, 2014 - link

    Ceph OSD's.
    These would make KILLER OSD's.

    6 spinning rust and 2 SSD's...
  • hoboville - Wednesday, January 29, 2014 - link

    An indirect answer: adding 10GbE to consumer MBs would increase the price too much. I think what you're not understanding is that the "Southbridge"/PCH/whateverAMDcallstheirs is the secondary controller concentrator on motherboards. The primary is the MCH, which is CPU on-die. Typically, what you see with processor manufacturers like Intel is that they portion away part of their PCI-E lanes into the PCH, so that PCH devices can have enough throughput to run at max speed without being bottlenecked and fighting for bandwidth when the PCI-E slots are full.

    So, for this motherboard, it runs 8x PCIe 3.0 instead of 16x, which is what most consumer MBs use. Why? Because these PCIe slots are typically going to be used either for more RAID cards or more network cards, not vid cards. These cards are typically 8x and 4x. So, to answer your question, the half of the normal PCIe bandwidth has been allocated to the PCH to run: 8x SATAIII ports at full speed, along with dual 10GbE ports, all while allowing those potential PCIe cards to run at full bore.

    Adding 10GbE to consumer boards would mean adding an expensive controllers to mobos (the PCH doesn't actually run the Ethernet controller, so you can have any Ethernet controller you want on a motherboard, including WiFi). Present mobos can support integrated 10GbE fine, but the board makers just have to add in the 10GbE controllers, and have enough bandwidth to support this design.
  • chizow - Tuesday, January 28, 2014 - link

    Great name for the series, just rolls right off the tongue and meshes great with the rest of their A-series line-up. Some marketing exec definitely earned his salary right there.
  • chizow - Tuesday, January 28, 2014 - link

    All kidding aside, I guess this is the culmination of their Sea Micro acquisition a few years back? I guess it will all depend how well AMD executed ARM's v8 ISA relative to the rest of the industry, but I do believe Qualcomm and Nvidia (along with IBM and Google via their OpenPower Consortium) were also targeting this market.
  • FwFred - Wednesday, January 29, 2014 - link

    They didn't really execute the v8 ISA since they are taking the same A57 microarchitecture as others. I'm sure AMD's memory hierarchy will differentiate as will the GF process vs. TSMC/Samsung/Intel.

    Question is if any ARM server vendors will be using 20nm. Intel already seems to have the A1100 beat in perf/W launching one year earlier. AMD will have to win sockets for other reasons.
  • Frenetic Pony - Wednesday, January 29, 2014 - link

    Apple seems to have bought exclusive use of 20nm for all of 2014. Nothing but Apple seems to be coming with 20nm that I've heard of, and there's cancellations of plans for 20nm from other vendors. EG Nvidia's "Maxwell" GPU architecture was announced as being 20nm awhile ago, and is now supposedly 28nm. Their "Denver" CPUs are the same.

    I think its safe to say that if Intel pulls off 14nm with a performance per watt drop this year they will officially be 3 years ahead of everyone else rather than just their previous lead of 2.
  • Frenetic Pony - Wednesday, January 29, 2014 - link

    Err, performance per watt increase... was going to do TDP drop but then they could just lower the clockspeed and... anyway.
  • extide - Wednesday, January 29, 2014 - link

    Maxwell will include both 20nm and 28nm chips.
  • fteoath64 - Thursday, January 30, 2014 - link

    Do not forget that Samsung has 14nm in risk production and could pull out a flagship SoC using that tech at a limited quantity. They way Sammy uses SoC in their handsets makes it more difficult for consumers to "pick and choose" what is inside in some cases. ie more than 1 supplier for SoC. While TSMC is in fully booked capacity, they also are close in 14nm process and could well shift when the 20nm contracts finish early (maybe ?) ?. TSMC seemed very efficient in their production facilities to date managing so many customers with different solutions and delivering whatever they do. Sammy is one that speaks the least about their fab capacities.

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