Intel on Thursday announced that it would delay mass production of its 10 nm processors from 2018 to 2019 due to yield issues. The company has claimed to be shipping some of its 10 nm chips in small volumes right now, but due to cost reasons the firm does not intend to initiate their high-volume manufacturing (HVM) at this time. Intel executives also stated that they are confident of their product roadmap and intend to launch Whiskey Lake and Cascade Lake products later this year.

Multipatterning Issues

Brian Krzanich, CEO of Intel, stated during a conference call with financial analysts:

“We are shipping [10-nm chips] in low volume and yields are improving, but the rate of improvement is slower than we anticipated. As a result, volume production is moving from the second half of 2018 into 2019. We understand the yield issues and have defined improvements for them, but they will take time to implement and qualify.”

Intel blames a very high transistor density and consequent heavy use of multipatterning for low yields. Brian Krzanich has said that in certain cases the company needs to use quad (4x), penta (5x), or hexa (6x) patterning for select features as they need to expose the wafer up to six times to “draw” one feature. This not only lengthens Intel’s manufacturing cycle (which by definition rises costs) and the number of masks it uses, but also has an effect on yields.

Intel’s 10 nm fabrication technology relies solely on deep ultraviolet (DUV) lithography with lasers operating on a 193 nm wavelength at this time. The company’s 7 nm manufacturing process will use extreme ultraviolet (EUV) lithography with laser wavelength of 13.5 nm for select layers, eliminating use of extreme multipatterning for certain metal layers. As it appears, right now Intel executives do not consider EUV technology ready for prime time in 2019, so the company’s engineers have to polish off the last DUV-only process (again) rather than jump straight to 7 nm.

10 nm Ramp in 2019

Intel does not elaborate whether it intends to ship (in volume) its 10 nm CPUs in the first half or the second half of 2019, but only says that the company’s engineers know the source of the yield problems and are working hard to fix them. As a result, it is pretty safe to assume that the actual ramp of Intel’s 10 nm production will begin towards the second half of next year.

“We are going to start that ramp as soon as we think the yields are in line, so I said 2019,” Mr. Krzanich noted. “We did not say first or second half, but we will do it as quickly as we can, based on the yield.”

In a bid to stay competitive before its 10-nm CPUs ship in the H2 2019 – H1 2020 (production ramp takes time, bigger processors will launch later than smaller parts), Intel plans to release another generation of products made using its 14 nm process tech. This generation of chips includes Whiskey Lake products for client PCs and Cascade Lake for the datacenter, and both are scheduled for release later this year.

Questions Remain: 10 nm Slip from 2016

Intel’s 10 nm manufacturing process has a long history of delays and without any doubts this transition has been the hardest in the company’s history. Let's do a quick recap.

First Production
1999 180 nm
2001 130 nm
2003 90 nm
2005 65 nm
2007 45 nm
2009 32 nm
2011 22 nm
2014 14 nm
2016 10 nm
2017 10 nm
2018 10 nm?
2019 10 nm!

Intel originally planned to commence shipments of its first processors made using their 10 nm fabrication technology in the second half of 2016. The first rumors about Intel’s problems with the tech started to spread in early 2015 as the company delayed the installation of equipment needed for its 10 nm manufacturing process. Then, in July 2015, the chip giant confirmed intentions to postpone 10 nm HVM from H2 2016 to H2 2017 due to difficulties incurred by multipatterning. Instead, the company promised to release its Kaby Lake products with enhancements and made using a refined 14 nm process (known as 14+ later).

Over the course of 2016 and 2017 we learned that Intel was prepping Cannon Lake (mobile, entry-level desktops), Ice Lake (higher-end client PCs, servers), and Tiger Lake chips on their 10 nm node. We also heard about various problems that Intel faced with its 10 nm technology, but the company refuses to comment on them. The chipmaker did demonstrate a system running a mobile Cannon Lake SoC at CES 2017, with a promise to release this processors late that year. Somewhere along the line, both Ice Lake and Tiger Lake slipped to 2018, which was partly confirmed by the launch of the Coffee Lake CPU made using a revamped 14 nm (14++) in late 2017.

Intel officially introduced the 10 nm fabrication process at IEDM 2017 and said it was on track to start shipments of CNL CPUs in early 2018. In January this year Intel confirmed that they had started to ship Cannon Lake processors in small volumes, but never elaborated. We have since learned that these were CNL-U parts in uninspiring 2+2 and CNL 2+0 configurations, however so far Intel has refused to state who the customer is or where anyone can buy them, despite repeated requests for this information.

Being a very large company, Intel has a multifaceted strategy that spans across product lines and generations. Right now, Intel is battling with yield issues that plague its Cannon Lake product family and the first-gen 10 nm manufacturing process. There are other 10 nm products in the pipeline that are to be made using a refined fabrication technology (such as 10+, 10++). It is pretty obvious that Intel will learn how to improve its 10 nm yields with the CNL lineup, but what remains to be seen is how significantly the delays of this product family affect launch schedules of its successors. Despite Intel's statements, there is outside discussion that Intel could decide to switch right to 7 nm, bypassing 10 nm altogether.

Related Reading

Sources: Intel, SeekingAlpha

Comments Locked


View All Comments

  • HStewart - Sunday, April 29, 2018 - link

    What I heard is that 7nm competition is close to what Intel would have is 12nm. I basically heard it will be denser than intel 14nm - but not as much as the Intel 10nm - I am comparing next generation technology.
  • Wilco1 - Sunday, April 29, 2018 - link

    No you must be thinking about 10nm from the foundries which shipped last year. The current generation 7nm is 15-30% denser than Intel's upcoming 10nm. However when 10nm ships next year it will compete with 7+ EUV processes which are even denser.
  • Wilco1 - Friday, April 27, 2018 - link

    No that's completely false. TSMC/Samsung/GF's processes are more dense than Intel 10nm. That's just the raw logic and SRAM density - generally in actual designs the difference is even larger. Several 20nm designs were shown to have higher density than Intel 14nm - and that was at a time where Intel was ahead.
  • Spunjji - Friday, April 27, 2018 - link

    That was a big chunk of the problems with 20nm... too small a feature size for planar transistors. 14nm was less dense in some circumstances but used that well for overall characteristcs.
  • ijdat - Saturday, April 28, 2018 - link

    TSMC/GF/Samsung 7nm processes are actually very similar (MMP, CPP) to Intel's 10nm; gate density is if you use the standard high-density low-power 6T libraries, but there are also 7.5T and 9T libraries similar to Intel's which which have lower density, higher speed and higher power to get similar results to Intel.

    The real yield problem with Intel 10nm could be multiple patterning (which everybody does -- but maybe they pushed it a bit too far) or the fact that they are the first to use cobalt instead of copper for a lot of low-level interconnect and vias, or a combination of both. Cobalt gives lower resistance, but as a completely new material could also be the underlying cause of their yield problems -- and having designed it in, they can't easily go back to copper.

    The foundries took the safe option and stayed with copper (maybe with cobalt for a very few layers and/or vias?) and slightly less aggressive multi-patterning, and don't have the same yield problem as Intel (yes I've seen internal foundry data for 7nm).
  • SaturnusDK - Saturday, April 28, 2018 - link

    No. What Intel planned originally was for their 10nm to be similar to about 7.7nm from other foundries. They've scaled it back twice now and are closer to about 8.6nm. That's a massive loss in expected density they've had to make just to get the process working.
  • HStewart - Saturday, April 28, 2018 - link

    Don't tell this to AMD fans - they will not believe it - they think is not as good and believe only in nm numbers - reality will come when Intel releases to the 10nm process and people again will call Intel a monopoly because nothing will be close to it.

    Just gluing 2 or 4 8 core - lower power Zen cores together - does not make it better.
  • Wilco1 - Saturday, April 28, 2018 - link

    Intel's 10nm process is already behind even if it was released today, so in a year it will be even more behind. The competition will make EUV chips next year. Hyperscaling done right!
  • HStewart - Sunday, April 29, 2018 - link

    Well it takes time to get real technology improvement do right - not just gluing 2 or 4 8 core zens together. How can you say "Hyperscaling done right" when AMD people are dropping like flies.
  • Wilco1 - Sunday, April 29, 2018 - link

    Actually combing multiple smaller dies is a great idea. It's standard in mobile SoCs. We will absolutely see much more of this in the future.

    Btw aren't you always promoting the multiple dies in your laptop? Or do you think it is only a good idea when Intel does it?

Log in

Don't have an account? Sign up now